1/4 rev. a structure silicon monolithic ic product name system power lsi for blu-ray/dvd model name BD19910MUV function (1) built-in 3.3v output synchronized rectifier type step-down dc-to-dc converter L (2) built-in 1.0v/1.5v output selectable rectifier type step-d own dc-to-dc converter (3) built-in synchronized rectif ier type step-up dc-to-dc converter L (4) built-in over-current and short-circuit protection functio n circuit L (5) built-in error-amplifier phase compensation (step-down onl y) L (6) operational frequency step-do wn : 2.0mhz(typ.), step-up : 1.0mhz(typ.) L (7) built-in reset function circuit and current switch L (8) built-in shut down function circuit absolute maximum ratings (ta=25) parameter symbol rating unit pvcc1 terminal voltage pv cc1 -0.36.5 v pvcc2 terminal voltage pv cc2 -0.36.5 v avcc terminal voltage av cc -0.36.5 v dcsw3 terminal voltage v dcsw3 -0.315.0 v vdco3 terminal voltage v vdco3 -0.315.0 v input terminal voltage (*1) v in -0.3vcc+0.3 v dcsw1 terminal output current (*2) i dcsw1 1 . 0 a dcsw2 terminal output current (*2) i dcsw2 1 . 0 a dcsw3 terminal output current (*2) i dcsw3 2 . 4 a vdco3 terminal output current (*2) i vdco3 2 . 4 a cswo terminal output current i cswo 0 . 2 a xreset terminal input current i xreset 1 0 m a power dissipation (*3) pd 4.56 w ambient temperature of operation topr -30+70 ambient temperature of preservation tstg -55+150 (*1) seldco1, selsq, cswon , enup, xendwn, selrst (*2) absolute maximum ratings of this parameter include ripple curre nt (*3) while mounted on fr4 glass-epo. 4 layer board (5505mm 2 ) operation condition(ta=25) parameter symbol min. typ. max. unit. pvcc1 terminal voltage pv cc1 4.5 5.0 5.5 v pvcc2 terminal voltage pv cc2 4.5 5.0 5.5 v avcc terminal voltage av cc 4.5 5.0 5.5 v vdco1 output current i dco1 - - 0.8 a vdco2 output current i dco2 - - 0.8 a vdco3 output current i dco3 - - 0.6 a vdco3 output voltage setting range v dco3 6.0 - 11.0 v cswo output current i cswo - - 0.1 a this product is no antiradiation design
2/4 rev. a electrical characteristics pv cc1=pvcc2=avcc=5.0v,ta=25 unless otherwise specified parameter symbol min. typ. max. unit condition [total] current consumption i cc - 3.6 7.2 ma vdco1=vdco2=5v, fb3=0v, cswon=enup=5v, xendwn=0v shutdown current i shut - 1.2 3.0 ma enup=0v, xendwn=5v [input io block : enup, xendwn, seldco1, selsq, selrst, cswon] high level input voltage v ioh 2.0 - - v low level input voltage v iol - - 0.8 v input current h i io1 -5.0 - 5.0 a input=5v input current l i io2 -5.0 - 5.0 a input=0v [step-down dc-to-dc converter block] vdco1 voltage v dco1a 1.455 1.500 1.545 v seldco1=0v v dco1b 0.970 1.000 1.030 v seldco1=5v vdco2 voltage v dco2 3.201 3.300 3.399 v oscillation frequency f oscdwn 1.4 2.0 2.6 mhz high-side-switch resistance r onh1,2 - 0.40 0.60 low-side-switch resistance r onl1,2 - 0.30 0.50 soft start time t softdwn 0.6 1.0 1.8 ms no load [step-up dc-to-dc converter block] fbvref voltage v fb3 0.582 0.600 0.618 v oscillation frequency f oscup 0.7 1.0 1.3 mhz high-side-switch resistance r onh3 - 0.35 0.60 vdco3=10v low-side-switch resistance r onl3 - 0.30 0.50 vdco3=10v soft-start beginning time t softup 3.5 6.0 8.5 ms fb3=0v ampout3 maximum voltage v ampoh 2.2 2.5 2.8 v fb3=0v ampout3 minimum voltage v ampol - 0.03 0.20 v fb3=2.5v max duty cycle d max 72 80 88 % fb3=0v [reset block] reset on voltage v rston1a 3.600 3.700 3.800 v avcc is observed, selrst=0v v rston1b 4.087 4.200 4.313 v avcc is observed, selrst=5v v rston2a 1.140 1.200 1.260 v vdco1 is observed, seldco1=0v v rston2b 0.665 0.700 0.735 v vdco1 is observed, seldco1=5v v rston3 2.565 2.700 2.835 v vdco2 is observed reset hysteresis voltage v rsthys1a 70 100 130 mv avcc is observed, selrst=0v v rsthys1b 70 100 130 mv avcc is observed, selrst=5v v rsthys2a 70 100 130 mv vdco1 is observed, seldco1=0v v rsthys2b 70 100 130 mv vdco1 is observed, seldco1=5v v rsthys3 70 100 130 mv vdco2 is observed xreset output sink voltage v rsink - - 0.3 v isink=5.0ma xreset leak current i rlk -5.0 - 5.0 a xreset=5.0v reset delay time t rst 30 50 70 ms [current switch block] current sw on resistance r cswo - 0.5 1.0 cswon=5v
3/4 rev. a dimension block diagram terminal no.?terminal nam e terminal no. terminal name terminal no. terminal name 1 pgnd1 21 agnd 2 seldco1 22 cswo 3 pvcc1 23 cswi 4 avcc 24 cswon 5 pvcc2 25 xreset 6 selsq 26 vdco1 7 pgnd2 27 enup 8 dcsw2 28 dcsw1 9 reserve exposed pad gnd 10 vdco2 11 xendwn 12 selrst 13 reserve 14 dcsw3 15 pgnd3 16 reserve 17 vdco3 18 reserve 19 fb3 20 ampout3 vqfn028v5050 ( unit mm) lot no. drawing no.ex473-6001 d 1 9 9 1 0 19 18 16 15 saw 3 4 5 6 7 pvcc1 avcc pvcc2 selsq pgnd2 dcsw2 pgnd3 reserve vdco2 xendwn selrst reserve vdco3 reserve fb3 cswon xreset vdco1 enup dcsw1 control driver current sw 17 current limit reset 1 2 21 20 cswi cswo seldco1 pgnd1 ampout3 agnd reserve dcsw3 24 25 26 27 22 23 12 10 9 8 14 13 28 current limit control driver current limit control driver bias 11
4/4 rev. a notes on use 1. notes for printed pattern board ?pvcc1, pvcc2, avcc and cswi must be connected to power supply on the board. ?pgnd1, pgnd2, pgnd3 and agnd must be connected to gnd on the b oard. ?please wire with wide, short and keep low impedance for the pvcc1, pvcc2 and avcc connection. ?please wire with wide, short and keep low impedance for the pg nd1, pgnd2, pgnd3 and agnd connection. ?please extract the output of dc-to-dc converter from both ends of capacitor connected to vdco1, vdco2 and vdco3. ?the characteristics of dc-to-dc converter is influenced by sur rounding, components and board pattern design. consider the effects from surroundings while designing. 2. notes for external parts ?use low esr ceramic capacitor between pvcc1(pvcc2) and pgnd1(p gnd2). place the capacitor right next to the ic pins. ?please wire agnd independently from the gnd side of bi-pass ca pacitor. ?please use parts recommended by this specification and place e xternal parts such as inductors and capacitors right next to th e ic pins. especially, please use wide and short wire in the part where a large current flows. 3. notes for seldco1 terminal, sels q terminal and selrst terminal ?please connect these terminal to the power supply or gnd, and prohibit switching it after turning on the power supply (ic in operation). 4. notes for thermal shutdown function ?thermal shutdown function is activated by the chip temperature achieving 175 (typ.). and dc-to-dc converter output will be turned off (dcsw1=dcsw2=0.0v, dcsw3=vcc). ?main purpose of tsd is to shutting ic down from runaway effect . it is not to compensate or to protect set device. therefore, please do not continuously operate the ic after tsd circuit is activated and/or premise operations such that tsd circuit funct ion being used. 5. notes for over-voltage mute function ?over-voltage mute function is built in this ic. dc-to-dc conve rter output is turned off (dcsw1=dcsw2=0.0v, dcsw3=vcc) when th e vcc becomes 6.5v (typ.) or higher. 6. notes for over current protection function ?over-current protection circuit is built in to each outputs te rminal except vdco3 and xreset. which protects ic from destruct ion by abrupt vcc and gnd short. 7. notes for load current while start-up ?keep light load at each output while start-up. 8. notes for absolute maximum ratings ?even quality control of the product have fun well taken care, however operating above the absolute maximum ratings of supply voltage and/or operational temperature range may cause decay an d destroy the ic. please make it sure to use the ic within the operating rage at anytime while designing. ?operating over the maximum ratings of supply voltage and/or operational temperature may destroy the product. once destroyed, open/short mode to specify the defection is impossible. please have physical countermeasure such as adding fuse etc. if specif ic mode such that exceeding the absolute maximum ratings is expected. 9. notes for terminal to terminal short / miss-alignment ?while mounting ic on the board, check direction and shift of t he ic. if inadequately mounted, ic might destroy. ?avoid short-circuit of i/o terminals (vdco1, vdco2, vdco3, dcs w1, dcsw2, dcsw3) and vcc / gnd. if short-circuit of terminals and vcc /gnd is executed, the ic will break down and the smoke may occur. 10. notes for test of mounted print board ?while connecting capacitor to low impedance pins, please disch arge capacitor by one process by another to prevent stressing t he ic. while mounting and removing the ic to/from the board in the ins pection process, be sure to turn off the power supply at each a ctions. moreover equip ground earth in assembling process for esd prote ction and handle with care during the test and/or transportatio n. 11. notes for input terminal ?this ic is a monolithic ic, and has p + isolation and p substrate for the element separation. therefor e, a parasitic pn junction is firmed in this p-layer and n-layer of each element. for instance, the res istor or the transistor is connected to the terminal as shown i n the figure below. when the gnd voltage potential is greater than the volta ge potential at terminals a or b, the pn junction operates as a parasitic diode. in addition, the parasitic npn transistor is formed in s aid parasitic diode and the n layer of surrounding elements clo se to said parasitic diode. these parasitic elements are formed in the ic because of the voltage relation. the parasitic element operatin g causes the wrong operation and destruction. therefore, please be caref ul so as not to operate the parasitic elements by applying lowe r voltage than gnd (p substrate) to input terminals. moreover, please apply each input terminal with lower than the power-supply voltage or equal to the specified range in the guaranteed voltage when the power-supply voltage being applied. 12. notes for aso ?set up the current so as the output transistor not to exceed a bsolute maximum ratings and aso while operating the ic. 13. notes for thermal design ?in order to build sufficient margin into the thermal design, g ive proper consideration to the allowable loss (power dissipati on) in actual operation.
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